CPEN 230L: Introduction to Digital Logic Lab Spring 2018 - Claudio Talarico, Gonzaga University
Course DescriptionNumber systems and codes, Boolean Algebra, Logic gates and flip-flops. Verilog HDL. Combinational and sequential Logic Design using FPGAs. ScheduleLab. S01: W 1:10 PM - 3:50 PM, HRK 214 and HRK 100 Office Hours:
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