EENG 406: Tentative Topics

Introduction:

• A brief History of Integrated Circuits

• MOS Transistors

• CMOS Logic

• CMOS Layout

• System Design

• Logic Design

• Circuit Design

• Physical Design

• Design Verfication

• Fabrication, Packaging and Testing

MOS Transistor Theory:

• Ideal I-V Characteristics

• C-V Characteristics

• Nonideal I-V Effects

• DC Transfer Characteristics

• Switch-Level RC delay models

MOS Transistor Modeling:

• Gm/ID Design Methodology

CMOS Technology:

• Basics of CMOS Processing Technology

• Layout Design Rules

• Technology Related CAD Issues

Circuit Characterization and Performance Estimation:

• Delay Estimation

• Power Dissipation of CMOS Logic

• Design Margin

• Reliability

• Scaling

Circuit Simulation:

• SPICE Tutorial

• Device Models

• Device Characterization

• Circuit Characterization

• Interconnect Issues

Combinational Circuit Design:

• Circuit Families

• Static CMOS

• Pass-Transistor Circuits

Sequential Circuit Design:

• Conventional CMOS Latches and Flip-flops

• Set-up time, Hold time and clock skew

• Max delay constraints, Min-delay constraints

• Synchronizers

Design Methodology and Tools:

• Structured Design Strategies

• Design Methods

• Design Economics

• Data Sheets and Documentation

• ASIC and Custom IC

• CMOS Physical Design Styles

• Interchange Formats

Hardware Description Languages and Logic Synthesis:

• HDL coding styles

• Basic constructs

• Combinational Logic, Sequential logic, Finite State Machines