EENG 406: Assignments

Working directory (p.2):
mkdir ~/ee406work

The lib.defs file (p.2) should look as follows:
INCLUDE $CDE/contrib/samples/HSPICESimLib/lib.defs
INCLUDE $CDE/auxx/samples/lib.defs
DEFINE cdsDefTechLib /usr/class/cdsLibs/cdsDefTechLib
DEFINE ee406 /usr/class/CDE-ee406Lib/ee406
DEFINE SAED_PDK_90 /usr/s90pdk/SAED_PDK90nm/SAED_PDK_90
DEFINE reference /usr/s90pdk/SAED_PDK90nm/reference

Library name (p.3):
ee406s17Lib

nMOS Model name:
nmos114

Setup the model file to be used by the simulator as follows (p.12):
Setup -> Model files -> /usr/class/hspice_libs/ee114_hspice.mod

Ignore instructions starting from “In order to …” (p.28, line 10) to “cd ./results” (p.29, line 12). Instead from the SAE do:
setup -> include files ->
type: outputs
file: /usr/class/hspice_libs/postinclude.sp

Use the transistor cells nmos4t and pmos4t from the library SAED_PDK_90

The model name for the cells nmos4t and pmos4t are respectively n12 and p12

In the simulation environment setup the model file: /usr/s90pdk/SAED_PDK90nm/hspice/SAED90nm.lib

and make sure to select TT_12 in section field

Project: Design, Layout and Simulation of an operational amplifier

• The starting technology for the project is:
  ON Semiconductor's C5 (500nm) CMOS process with two polysilicon layers and 3 levels of metal.

To get up to speed with the project watch Lectures 19 (start at ~38:50 min) through 26 (up to ~33 min.)
from Jake Baker's EE422/ECG622 Introduction to Analog IC Design course (Spring 2013)