VLSI Design Flow

The goal of this page is to provide a concise overview of the steps needed to create and verify simple CMOS circuits and systems.

Setting up and installing the required softwares

Since most engineering students at GU have Windows machines we will focus on how to install and setup all EDA softwares on Windows OS using WSL

• instructions to enable WSL and install xschem, magic, netgen and ngspice on Ubuntu

Students owning an Apple machine can try to build the required softwares directly from source code (follow this link for a few hints)
Students owning an intel based Apple machine have also the option to download and install the latest version of Oracle VM Virtual Box for OS X host, and create a Linux Virtual Machine (use the latest LTS Ubuntu Linux distribution available).

• instructions to install and set up a VM.

Finally, if you don't want to install any tool you can use the following docker's container, courtesy of the IIC at JKU:

• IIC-OSIC-TOOLS

Analog Design

Free EDA Software Tools

• LTspice: schematic editor and circuit simulator

• ngspice: circuit simulator

• Electric VLSI Design System: schematic and layout tool (layout editor, DRC, extraction and LVS)

• Xschem: schematic editor

• Magic VLSI: Layout editor, extraction and DRC

• Netgen: LVS

• KLayout: Layout viewer and editor

Design, Simulation and Layout using Free Tools

1. A Quickstart guide to ngspice

   1. netlist

   2. spice models (ON semiconductor C5 technology)

2. CMOS inverter
   

   1. schematic using Electric VLSI and circuit simulation (DC sweep analysis) with both LTSPICE and ngspice

   2. hierarchical schematic using Electric VLSI and circuit simulation (TRAN analysis) with ngspice

   3. postprocessing the ngspice simulation results (DC sweep and TRAN) using matlab and Hspice Toolbox

   4. postprocessing the ngspice simulation results (DC sweep and TRAN) using Python

   5. drawing the layout and running a post-layout simulation

3. CMOS ring oscillator
   

   1. design, layout, and simulation

For now there is no official skywater 130nm technology file for Electric VLSI, so we are going to use separate tools for the schematic (xschem) and the layout (magic VLSI).
The development of Magic VLSI is Linux based, so to run it on Windows we are going to enable the Windows Subsystem for Linux (WSL) feature and get the Ubuntu Linux environment up and running in Windows.

1. instructions to enable WSL and install xschem, magic, netgen and ngspice on Ubuntu
   
   

2. CMOS inverter

   1. schematic using xschem and circuit simulation using ngspice

   2. postprocessing the simulation results using Python

   3. layout using magic VLSI

   4. LVS using netgen

   5. parasitic extraction using magic and post-layout simulation with ngspice

3. CMOS ring oscillator

   1. schematic using xschem and circuit simulation using ngspice

   2. layout using magic VLSI

   3. LVS using netgen

   4. parasitic extraction using magic and post-layout simulation with ngspice

Design methods

• Design of analog CMOS circuits using \(g_m/I_D\) based lookup tables

  • B. Murmann, \(g_m/I_D\) Starter Kit

  • References:

    • P. Jespers and B. Murmann, Systematic Design of Analog CMOS Circuits: Using Pre-Computed Lookup Tables, Cambridge University Press, 2017

    • T. Konishi, K. Inazu, J.G. Lee, S. Masui, and B. Murmann, “Optimization of High-Speed and Low Power Operational Transconductance Amplifier using \(g_m/I_D\) Lookup Table Methodology,” IEICE Trans. Electronics, vol. E94-C, no.3, Mar 2011

    • A. Youssef, B. Murmann, and H. Omran, “Analog IC Design Using Precomputed Lookup Tables: Challanges and Solutions,” IEEE Access, vol.8, 2020

    • B. Murmann, Systematic Design of Analog Circuits Using Precomputed Lookup Tables, SSCS meeting, Toronto, Feb. 2016

    • C. Talarico, G. Agrawal, J. Roveda, and H. Lashgari, “Design Optimization of a Transimpedance Amplifier for a Fiber Optic Receiver,” Circuits, Systems, and Signal Processing, Springer, vol. 34, 2015

  • Notes on how to build the \(g_m/I_D\) lookup tables using Eldo

    • NOTE: this is just a “porting” of the scripts provided by Boris Murmann in the \(g_m/I_D\) Starter Kit
      (thanks to Boris for helping me debug a couple of issues)

    • scripts:

      • techsweep_eldo_run.m

      • techsweep_cfg_bsim3_180_eldo.m

      • techsweep_eldo_debug.m

      • test_lookup_eldo.m

      • test_lookupVGS_eldo.m

    • .mat files produced with Eldo:

      • 180nch_e.mat (download) –> to extract use: tar -xvzf 180nch_e.tgz

      • 180pch_e.mat (download) –> to extract use: tar -xvzf 180pch_e.tgz

    • \(g_m/I_D\) design example (Hspice vs. Eldo)

  • Notes on how to build \(g_m/I_D\) lookup tables using Ngspice (sky130 process)

    • scripts

Digital Design

Free EDA Tools

• Icarus: Verilog compiler and simulator

• GHDL: VHDL compiler and simulator

• GTKWave: wave viewer

• Quartus Prime Lite edition: HDL synthesis

• Questa FPGA Starter Edition: HDL simulator